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00852nam a2200205 a 4500 |
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20171111234322.0 |
| 008 |
120719s2012 cy da r 000 u eng d |
| 040 |
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|a CY
|b University of Cyprus
|e AACR-2
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| 041 |
0 |
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|a eng
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| 050 |
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|a TK7874.75.H75 2012
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| 100 |
1 |
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|a Χρίστου, Κυριάκος Α.
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| 245 |
1 |
0 |
|a Path delay fault testing for digital VLSI circuits using specialized binary decision diagrams/
|c Kyriakos A. Christou
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| 260 |
|
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|a Nicosia:
|b [s. n.],
|c 2012
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| 300 |
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|a xviii, 157 p. :
|b col. ill., tables ;
|c 31 cm.
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| 500 |
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|a Supervisor Maria K. Michael.
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| 504 |
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|a Includes bibliography (p. 150-157).
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| 650 |
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0 |
|a Integrated circuits
|x Very large scale integration
|x Testing
|x Data processing
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| 650 |
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0 |
|a Delay faults (Semiconductors)
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| 952 |
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|a CY-NiOUC
|b 5a043f3d6c5ad14ac1ea51ef
|c 998a
|d 945l
|e TK7874.75.H75 2012
|t 1
|x m
|z Books
|
