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00769nam a2200205 a 4500 |
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20171111230051.0 |
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060708s2000----gr er 000 0 Eng d |
| 020 |
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|a 0792379330
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| 040 |
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|a GR-AtNTU
|b gre
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| 082 |
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0 |
|a 004.35 XUE
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| 100 |
1 |
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|a Xue, Jingling
|
| 245 |
1 |
0 |
|a Loop tiling for parallelism /
|c Jingling Xue
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| 260 |
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|a Boston:
|b Kluwer Academic Publishers,
|c c2000
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| 300 |
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|a xix, 256 p. :
|b diagrams. ;
|c 24 cm.
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| 490 |
0 |
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|a Kluwer international series in engineering and computer science ;
|v secs 575
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| 504 |
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|a Includes bibliography and index.
|
| 650 |
1 |
0 |
|a Parallel processing (Electronic computers)
|
| 650 |
1 |
0 |
|a Electronic data processing
|x Distributed processing
|
| 952 |
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|a GR-AtNTU
|b 59cc157a6c5ad13446f69b80
|c 998a
|d 945l
|e 004.35 XUE
|t 1
|x m
|z Books
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